Forbes

The RISC-V Architecture Secures Smartwatches With Google And Qualcomm

Today, Google and Qualcomm announced an extension of their partnership to bring RISC-V-based systems-on-chips (SoCs) to market with support for Wear OS, a version of Android for smartwatches and ...
TechSpot

Google just removed RISC-V support from the Android kernel

Facepalm: The open-source RISC-V instruction set architecture, evolved from other reduced instruction set computer (RISC) architectures, is winning international support and collaboration. However, ...
Semiconductor Engineering

Exploring The Security Framework Of RISC-V Architecture In Modern SoCs

In the rapidly evolving world of technology, system-on-chip (SoC) designs have become a cornerstone for various applications, from automotive and mobile devices to data centers. These complex systems ...

SiFive To Integrate Nvidia NVLink Fusion For Next-Gen AI Data Center Chips

SiFive has announced a partnership with Nvidia to integrate Nvidia’s NVLink Fusion interconnect technology into its ...
Design And Reuse

Quintauris Demonstrates RISC-V Innovation in Automotive at CES

Quintauris, a leading provider of RISC-V solutions, announced a strategic collaboration with Synopsys, the leader in engineering solutions from silicon to systems. This collaboration aims to secure ...
redsharknews.com

The key CPU architecture you've never heard of: RISC-V

The RISC-V CPU architecture currently accounts for under 1% of the world’s processor market, but that is going to change rapidly over the next years as its parallel processing is perfectly suited to ...
TechSpot

DeepComputing announces new tablet based on the RISC-V architecture

In context: After introducing the world's first RISC-V laptop, DeepComputing is now launching what is expected to be the first fully-fledged mobile platform based on the open ISA. The company is ...
Android Police

Android wants to support a promising open-source CPU architecture

Manuel Vonau was Android Police's Google Editor until April 2024, with expertise in Android, Chrome, Pixels, and other Google products. For five years, he covered tech news and reviewed devices after ...
Dark Reading

Security Concerns Plague Emerging Chip Architecture

An emerging chip architecture gaining traction in smartphones, automotive technologies, and other electronics may find adoption stymied by security concerns. Using x86 and ARM processors for hardware ...
insideHPC

@HPCpodcast: An Architecture Update from RISC-V International CTO Mark Himelstein

Mark Himelstein, chief technology officer at RISC-V International, joins us to discuss the latest developments with the RISC-V instruction set architecture and its growing community and footprint.
Ars Technica

Google wants RISC-V to be a “tier-1” Android architecture

Over the holiday break, the footage from the recent “RISC-V Summit” was posted for the world to see, and would you believe that Google showed up to profess its love for the up-and-coming CPU ...
Electronic Design

Examining the RISC-V Architecture

RISC-V is an open-source instruction set definition managed by RISC-V International. This TechXchange includes content that delves into the architecture and design of a RISC-V processor core. How did ...