EDN

Automating rule sets for safety-critical HDL coding

During the development process for safety-critical designs, all precautions should be taken to prevent device failures from all foreseeable sources, including those due to poor design methods and ...
Electronic Design

The MathWorks App Generates HDL Code From System Models

The Simulink HDL Coder automatically generates synthesizable hardware description language (HDL) code from models created in the company’s Simulink and Stateflow software. It produces ...
EDN

10.22.98 Covering your HDL chip-design bets

Code-coverage increases simulation time. The added time depends on code quality, coding style, the extensiveness of the coverage feature set, and the simulator interface. The increased use of imported ...
Electronic Design

"Missing Link" Generates HDL Code From Simulink/Matlab Models

A persistent bugaboo in adopting electronic system-level (ESL) design methodologies is how to avoid wasting the work done above RTL. Certainly, designers of DSPs in particular have enjoyed using the ...
Business Wire

Sigasi Transforms Design Development with Visual Studio Code Extension

GENTBRUGGE, Belgium--(BUSINESS WIRE)--Sigasi, the leading developer of hardware description language (HDL) design solutions, today announced the availability of its Visual Studio Code (VS Code) ...
Business Wire

Aldec Brings Assertions to FPGA Designers with the Release of Active-HDL 8.1

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed-language simulation for ASIC and FPGA devices, announced today the release of Active-HDL 8.1. The new release introduces a ...