ExtremeTech

RISC rides again: New RISC-V architecture hopes to battle ARM and x86 by being totally open source

A new instruction set by the original creator of MIPS aims to reinvent the ultra-low power, high-efficiency processor -- and to do so with an architecture that's fundamentally open and available to ...
ExtremeTech

RISC vs. CISC Is the Wrong Lens for Comparing Modern x86, ARM CPUs

Try to investigate the differences between the x86 and ARM processor families (or x86 and the Apple M1), and you'll see the acronyms CISC and RISC. It's a common way to frame the discussion, but not a ...
Seeking Alpha

SEALSQ Adopts RISC-V the Open-Standard RISC-V Architecture; Achievement Aligns with Rising Global Demand for Edge-AI and Machine Learning Applications

Geneva, Switzerland, Sept. 13, 2024 (GLOBE NEWSWIRE) -- For more information visit: https://riscv.org/news/2024/07/sealsq-risc-v-semiconductors-is-pioneering ...
Ars Technica

AMD chips RISC or CISC?

I was just wanting to know if anyone can tell me if the new athlon mp and xp's are risc chips or if they went to cisc. I know the older AMD chips were all RISC, but not sure of the newer ones. When ...
SDxCentral

Is RISC-V China’s Semiconductor Salvation?

U.S. trade restrictions and growing pressure from the Chinese Communist Party to end reliance on foreign chipmakers has left many Chinese technology companies understandably worried. Faced with this ...
Electronic Design

Embracing Multicore and RISC-V Architectures in SoC Design

There’s been a significant shift toward RISC-V architectures in SoC design. This article highlights its impact on the semiconductor industry and role in fostering innovation and flexibility in ...
Ars Technica

A history of ARM, part 1: Building the first chip

RISC is a somewhat misleading term, as a RISC processor doesn't *have* to have fewer instructions in its ISA than a CISC system (Though RISC architectures do tend to try to do so). For example, the ...
Semiconductor Engineering

A RISC-V Capability Architecture Orchestrating Compiler, Architecture, And System Designs For Full Memory Safety (Georgia Tech, Arm Research)

A technical paper titled “RV-CURE: A RISC-V Capability Architecture for Full Memory Safety” was published by researchers at Georgia Institute of Technology and Arm Research. “Despite decades of ...
The Motley Fool

1 Massive Overlooked Risk for Intel and AMD

The semiconductor industry is in for some big changes as new design architectures come to bear. Arm chips made headway in markets traditionally dominated by Intel and AMD, and RISC-V chips could be ...